10th IEEE INTERNATIONAL TEST CONFERENCE INDIA
2026
JULY 19-21, 2026 | RADISSON BLU, MARATHAHALLI, BENGALURU
DISTINGUISHED ADDRESSES
Alpa Sood
Teradyne
The Critical Role of Test Strategy in India's Semiconductor Growth
As India accelerates its ambitions of becoming a global semiconductor hub, developing a robust test ecosystem is emerging as a strategic priority. Advanced test methodologies are essential not only for ensuring product quality and reliability but also for strengthening manufacturing capabilities, enabling supply chain resilience, and enhancing global competitiveness. This talk explores the pivotal role of test strategy in building a sustainable semiconductor ecosystem, highlighting the importance of collaboration between industry, government, and academia to support India's vision of becoming a leading semiconductor nation.
Speaker Biography —Alpa is Country Manager for India at Teradyne, bringing over 15 years of experience across business, policy, and government affairs. Throughout her career, she has worked closely with the Government of India and various state governments to foster the growth and innovation of the semiconductor ecosystem, building strong partnerships between the public and private sectors that create opportunities for businesses, entrepreneurs, and the broader industry.
Prior to joining Teradyne, Alpa led government affairs, legal, and strategic policy engagement at Marvell India, where she developed deep expertise in navigating complex industry landscapes. Her extensive background in bridging public and private sector relationships makes her a driving force in shaping India's semiconductor future.
Don Chan
Cadence
From Point Tools to Agentic AI: How EDA has impacted Semiconductor Industry
Electronic Design Automation (EDA) has been the driving force behind decades of semiconductor innovation, enabling engineers to design increasingly complex chips while sustaining the pace of Moore's Law. As transistor scaling approaches its physical limits, the industry is transitioning toward heterogeneous chiplet-based architectures, 3D integration, and AI-driven design methodologies. This talk explores the evolution of EDA from traditional point tools to intelligent, agentic AI workflows, highlighting how advances in design technology co-optimization, DFT methodologies, and AI-assisted automation are reshaping semiconductor design. Attendees will gain insights into the next generation of EDA technologies that will power future innovations in high-performance computing and artificial intelligence.
Speaker Biography —Don Chan is Vice President of Research and Development at Cadence, where he leads the Foundry organization and drives strategic partnerships across the global semiconductor ecosystem. He oversees technology enablement, process certification, and customer support for advanced semiconductor nodes while also leading marketing and business development for Cadence's Digital and Signoff product portfolio. Throughout his career, he has led key R&D initiatives spanning 3D-IC, Conformal, Modus, and Stratus technologies, and previously held leadership positions at Synopsys and Fujitsu Micro.
His extensive experience in semiconductor design enablement, foundry collaboration, and advanced EDA technologies has provided him with a unique perspective on the evolution of chip design methodologies. By working closely with foundries, customers, and global R&D teams to deliver next-generation design solutions, Don is uniquely positioned to discuss how agentic AI, heterogeneous integration, and intelligent EDA workflows are transforming the future of semiconductor design.
Rajesh Vaddempudi
Advantest, India
The Intelligent Silicon Era: Redefining Semiconductor Test Through Innovation, AI, and Collaboration
The semiconductor industry is entering an era where artificial intelligence, intelligent automation, and ecosystem collaboration are fundamentally reshaping test methodologies. As silicon complexity continues to increase, traditional approaches must evolve to deliver higher quality, faster time-to-market, and greater manufacturing efficiency. This talk explores how innovation in semiconductor test, combined with AI-driven intelligence and strong industry partnerships, is redefining the future of silicon validation, production, and lifecycle management, enabling the next generation of high-performance and reliable semiconductor products.
Speaker Biography —Rajesh Vaddempudi is the Managing Director of Advantest India and a seasoned semiconductor leader with over 26 years of experience driving business growth, engineering innovation, and operational excellence. Throughout his career at Advantest, Texas Instruments, and Tessolve, he has developed deep expertise in semiconductor test, product engineering, and post-silicon validation, leading the establishment of advanced test infrastructures spanning wafer sort, final test, qualification, and reliability.
Having successfully guided complex semiconductor products from silicon validation through production ramp, Rajesh brings a comprehensive understanding of the technologies and collaborative strategies required to deliver high-quality products at scale. His leadership across engineering, manufacturing, and customer engagement provides a valuable perspective on how AI and innovation are transforming the future of semiconductor test.
Arojit Roychowdhury
Qualcomm
Semiconductor Test: A Product Perspective
As semiconductor products evolve from ultra-low-power edge devices to high-performance computing platforms, meeting increasingly stringent targets for power, performance, area, cost, and quality has become a defining industry challenge. Semiconductor test plays a pivotal role in bridging design and manufacturing by enabling high yield, product quality, and rapid time-to-market. This talk presents a product-centric perspective on semiconductor test, highlighting its growing importance in delivering reliable, scalable, and manufacturable silicon for high-volume production.
Speaker Biography —Arojit Roychowdhury is Senior Director of Technology at Qualcomm India, where he leads chipset engineering for Snapdragon-based mobile platforms from concept through high-volume production. With over two decades of experience in semiconductor product development, he has held leadership roles across SoC design, architecture, and customer engineering at Qualcomm, Texas Instruments, and Intel. He holds an M.Tech in Electronic Systems from IIT Bombay and a Bachelor's degree in Electronics from the University of Mumbai.
Having led multiple generations of high-volume semiconductor products from concept to commercialization, Arojit has firsthand experience in balancing engineering innovation with manufacturability, quality, and market demands. His product development perspective offers valuable insights into how semiconductor test serves as a critical enabler of product success, ensuring robust quality, accelerated production readiness, and sustained customer satisfaction.