Call for Tutorials

Call For Submissions

Important Dates :


✓ Tutorial submission deadline : 16th May, 2023 – Closed
✓ Author notification : 29th May, 2023 – Closed
✓ Final manuscript due : 19th June, 2023

✓ Tutorial submission deadline :
2nd April, 2023

✓ Author notification :
29th May, 2023

✓ Final manuscript due :
19th June, 2023

The Call For Tutorials for ITC Conference 2023 is live!

International Test Conference is the world’s premier venue dedicated to the electronic test of devices, boards and systems—covering the complete cycle from design verification, design-for-test, design-for-manufacturing, silicon debug, manufacturing test, system test, diagnosis, reliability and failure analysis, and back to process and design improvement. At ITC India, design, test, and yield professionals can confront challenges faced by the industry, and learn how these challenges are being addressed by the combined efforts of academia, design tool and equipment suppliers, designers, and test engineers. This ITC India conference will be focusing on Test development in India but the submissions may not be limited to topics related to this region. Topics related to design and test development across multi geographical regions will be of special interest.

Authors are invited to submit original, high quality, practical and industry best practices as Tutorials describing recent work in the field of test and design.

Note: For detailed information about the submission process, requirements and deadlines, the selection process and any other questions regarding the program itself or contact information, please consult the ITC India web site at or email the program chair at [email protected]

Submission Guidelines

  • Tutorial title
  • An electronic copy of a Tutorial program with a list of topics covered, a short description of each topic and the approximate time devoted to each topic (about 2000 words) – Submission link
  • The targeted audience and prerequisites (about 50 words)
  • Tutorial duration should be 3 hours (for full tutorials) or 1.5 hours (for short tutorials)
  • Name, affiliation, e-mail address of each author
  • Proposals will undergo a panel review process
  • All presenters listed in the tutorial proposal must be available for tutorial presentation
  • Consent should be obtained from all the presenters and all organizations involved in presenting the material before making the tutorial proposal
  • Accepted tutorial abstracts will be published in conference proceedings

ITC India invites submissions on the latest advances in test, validation and diagnosis of ICs, boards and systems.

Topics of interest include (not limited to)

3D/2.5D Test
Adaptive Test in Practice
ATE/Probe Card Design
Advances in Boundary Scan
Silicon Bring Up
Data Driven Methods
Data Exchange and Infrastructure
Defect-Oriented Testing
DFM and Test Diagnosis
Economics of Test
End-to-End Data Analysis
Embedded BIST & DFT
Emerging Defect Mechanisms
Hardware Security and Trust

IoT Testing
Known-Good-Die testing
Memory Test and Repair
MEMS Testing
Mixed-Signal and Analog Test
New Technologies and Test
On-Chip Test Compression
Online Test
Pre- and Post- Silicon Validation
Power Issues in Test
Protocol-aware Test
Reliability and Resilience
Scan Based Test
SoC/SiP/NoC Test


Silicon Debug
Jitter, High-Speed I/O and RF Test
Simulation and Test
System Test (Applications)
System Test (Hardware/Software)
Test-to-Design Feedback
Test Escape Analysis
Test Flow Optimizations
Test Generation and Validation
Test Resource Partitioning
Test Standards
Test Time Analysis and Reduction
Testing High Speed Optics/Photonics
Yield Analysis and Optimization