From desk of General Co-Chair

The semiconductor test domain is becoming an increasingly challenging and exciting space for the engineering and research communities.

In a span of three decades, test has transformed from an optional technology to a mission-critical technology; test has expanded its wings to every step from design inception to post-silicon; test automation has become an intelligent hardware/software collaboration problem from a computationally hard software problem; and ideas from test are effectively getting extended to the security and reliability domains. Test economics has been an interesting space for those who seek insights, and it is becoming much more exciting with test becoming a part of the silicon lifecycle.

On the other hand, Governments across the globe are enabling more innovation in the semiconductor space through various policies and programs. There is a never-before-seen push from the Indian Government to kickstart semiconductor manufacturing and assembly, where testing plays a vital role.

In light of these developments, it is imperative for the niche semiconductor test community to stay connected with the ongoing research and advancements in the test domain. The ITC India conference is one such platform to connect, learn, and share information. The conference, which started in 2017 with the intent to connect and build a test community in the India region, has garnered tremendous strength and support with each edition. Through this platform, many workshops and seminars are conducted throughout the year at the premier institutes in the country to talk about semiconductor testing. Thanks to the sponsors and supporters, a number of fellowships are offered to academics to participate in the conference and stay connected with the industry.

The 7th edition of ITC India is going to happen from July 23rd–25th at Radisson Blu, ORR, Bengaluru. The technical agenda is prepared with extreme care to cover the breadth of topics and spectrum of attendees. We will be kick-starting this edition with 10 Tutorials on topics ranging from the basics to contemporary topics in DFT, Test, and Security. In the subsequent two days, there are four exciting keynotes planned on emerging topics such as Silent Data Corruption (SDC), Silicon Life Cycle Management (SLM), Analog Test, Test challenges in full flow, and time-to-closure. Due to the significantly higher number of paper submissions this year, we ended up selecting more research papers and will be running three parallel tracks for paper presentations as opposed to two tracks in previous editions. The program is not just filled with engaging presentations, panel discussions from industry veterans and academicians but also includes a number of poster presentations from enthusiastic engineering community.

On behalf of the organizing committee, I invite you all to join us and celebrate the innovations in semiconductor test, build new connections, and re-establish old connections. Looking forward to seeing you all at the venue!


Sameer Chillarige

ITC India 2023 – General Co-Chair