Panel Discussion 2

Title: “Talent Development in Test/Validation Domains“

Abstract: The International Test Conference (India) is an excellent platform to discuss a practical problem that challenges semiconductor companies based in India, namely, the problem of talent acquisition and retention, especially in the areas of test and validation. A number of companies recruit engineers without the relevant background and provide on-the-job training. Not only is this expensive, it is not sustainable in the long run. On-the-job training is a short-term solution. Highly talented individuals who need to make a career in the test and validation area look for a good theoretical foothold, which is best provided as part of academic education. I propose to have a panel discussion on the topic of talent development in the test and validation domains, where panelists will debate on practical issues facing the industry and academic institutions, and offer some solutions to overcome these problems.

Panelists:

  1. Binoy Maliakal (TI)
  2. Pathy Iyer (Keysight)
  3. Rajesh Vaddempudi (Tessolve)
  4. Prashant Narang (Cadence)
  5. Venkat Sunkara (ChipEdge)

Moderator: Dr C P Ravikumar

Panelists Details:

1. Binoy Maliakal

Binoy Maliakal, TI

  • 33+ Years in Semiconductor Fab, Product, Test and Validation Engineering
  • 11yrs in Semiconductor Wafer Fab and Integrated Circuits Test at Bharat Electronics (BEL)
  • 16yrs in Test, Validation and Product Engineering at Cypress Semiconductor (Infineon now).
  • Last 6yrs in Texas Instruments. Engineering Director of Product, Test and Validation in Analog Power Products Team.

2. Pathy Iyer

Pathy Iyer, Keysight

  • Head, Business Development at Keysight
  • Has helped many Universities in setting up labs and define curriculum in Test/RF
  • Skilled in Product Marketing, Product Development, Research and Development (R&D), Cross-functional Team Leadership, and Electronics.
  • Strong consulting professional.

3. Rajesh Vaddempudi

Rajesh Vaddempudi, Tessolve

  • 22+ years of experience in Test and Product Engineering across products (PMIC / Mixed Signal / HSIO etc) and across ATE platforms.
  • Presently leading 1000+member Test Product Engineering team at Tessolve as Vice President Test Engineering.
  • Part of the leadership team to grow Test product engineering expertise across multiple locations of Tessolve and provide quality test solutions to customers.
  • Passionate about training and grooming local talent and producing low-cost test solutions to support volume manufacturing.

4. Prashant Narang

Prashant Narang, Cadence

  • Prashant Narang is Product Validation Director of Test team at Cadence with 20 years of industry experience.
  • He has received several awards for significant improvement in process, quality and operational excellence.
  • He was General chair of Technology and Quality Conference i.e. TEQfest at Cadence in 2019.  

5. Venkat Sunkara

Venkat Sunkara, ChipEdge

  • 22 yrs experience in Semiconductor industry
  • Founded Chipedge in 2012 and offering skill development courses in VLSI for last 10 years including a course in DFT. 

Moderator Details:

Dr C P Ravikumar

Dr C P Ravikumar, Texas Instruments

C.P. Ravikumar has 23 years of experience in the industry (Texas Instruments, Controlnet India, and Infosys). I also have 10 years of teaching experience at IIT Delhi. I obtained my Ph.D. from the University of Southern California. More personal information about me is available from cpravikumar.tripod.com. As a secretary of the VLSI Society of India and IEEE CAS Bangalore, I have organized hundreds of workshops, seminars and tutorials. I have been the General Chair and Program Chair of premier events such as the International Conference on VLSI Design and I initiated the VLSI Design and Test Symposium and nurtured it for 16 years as its Generaal Chair. I have conducted more than 25 panel discussions in different conferences. I have also participated as a panelist in a few panel discussions.

  • 24 years of experience in the industry and 10 years of teaching experience at IIT Delhi.
  • As a secretary of the VLSI Society of India and IEEE CAS Bangalore, organized hundreds of workshops, seminars and tutorials.
  • General Chair and Program Chair of premier events such as the International Conference on VLSI Design
  • Initiated the VLSI Design and Test Symposium and nurtured it for 16 years as its Generaal Chair.
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Submissions

Conference

Event Location

Radisson Blu Hotel, Bengaluru Outer Ring Road

Address: 90/4 Outer Ring Road, Marathahalli, Bengaluru, 560037, India

Google Maps Direction: https://goo.gl/maps/nyvHRWcNstifH6TE6