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The system-on-chip (SOC) concept has evolved into “Analog SOCs”, wherein an increasingly larger analog content dominates the area of today’s micro-controller, communication interface and RF transceiver chips. The problem of analog test is now further aggravated with embedded analog due to limited access to individual IPs therein and the over-riding constraint of using “SOC testers” (with limited allocation of pins and instruments).
Such SOCs find widespread use in automotive and industrial applications, and hence their cost-effective test is critical to these businesses.
This tutorial covers specific test challenges with embedded analog, and DFT and test techniques to address them, together with case studies (illustrating implementation difficulties and matching solutions), and recipes for test readiness at time of first silicon.
Rubin Parekhji has been with Texas Instruments, Bangalore, since 1996, where he has led and mentored DFT teams on various design and test technology projects across multiple product groups. More recently, he has been in Central Analog Engineering organisation at TI, working on low cost test methods and test entitlement targets with world-wide teams, as a distinguished member of the technical staff. He has published regularly and delivered tutorials at leading conferences, has mentored a large number of students, and has several issued patents. He has a Ph.D. from Indian Institute of Technology, Bombay, India.
Malav Shah is working with Texas Instruments, Bangalore, since 2006 in the area of Design for Test. He is currently the DFT architect and lead in the Processor group in TI, and is a senior member of the technical staff at TI. He has worked on the DFT architecture, definition and implementation and post-silicon debug for multiple MCU designs. He has been instrumental in driving the test cost reduction and enabling high test parallelism, spanning across testing of digital, analog and memories. He has presented at various TI internal and IEEE conferences, and holds two patents.